Regviz

Freescale Semiconductor /MK61F15WS /USBHS /DEVICEADDR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DEVICEADDR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MK61F15WS/USBHS/DEVICEADDR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0 (0)USBADRA 0USBADR

USBADRA=0

Description

Device Address Register

Fields

RESERVED

Reserved
USBADRA

Device Address Advance

0 (0): Writes to USBADR are instantaneous.

1 (1): When this bit is written to a 1 at the same time or before USBADR is written, the write to the USBADR field is staged and held in a hidden register. After an IN occurs on endpoint 0 and is ACKed, USBADR is loaded from the holding register.
USBADR

Device Address

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data